The demand for greater memory has required increasing density of integrated circuits, such as dynamic random access memory (DRAMs) by increasing the need for materials with high-dielectric-constants for use in electrical devices such as capacitors.
In general, capacitance relates directly to the surface area of the electrode in contact with the capacitor dielectric, but is not affected in any significant way by the electrode volume. Contemporary methods generally utilized to achieve higher capacitance per unit area entails increasing the surface area/unit area by increasing the topography, such as in stack capacitors using SiO.sub.2 or SiO.sub.2 /Si.sub.3 N.sub.4 as the dielectric. However, this approach is very difficult for the manufacturability for devices such as 256 Mbit and 1 Gbit DRAMs.
An alternative approach is to use high permittivity dielectric materials since many high-dielectric-constant (HDC) materials such as BSTO have much larger capacitance densities than standard SiO.sub.2 --Si.sub.3 N.sub.4 --SiO.sub.2 capacitors. In this connection, certain metallic compounds and metals such as the noble metals, and in particular, Pt has been used as the electrode for these HDC BSTO materials. However, to be reliable in electronic devices, the devices must be constructed in a manner which do not diminish the beneficial properties of these high-dielectric-constant materials.
In any case, HDC materials such as BSTO are generally not chemically stable when deposited directly on a conductor substrate, thereby requiring an additional layer to be deposited over the HDC materials. The additional layer should generally be chemically stable when in contact with the substrate and also when in contact with the high-dielectric-constant material.
Further, because of the unit area constraints, high density devices (e.g. 256 Mbit and 1 Gbit DRAMs) would normally require a structure wherein the lower electrode is conductive from the HDC material down to the substrate. The deposition of an HDC material generally proceeds at high temperatures (greater than about 500.degree. C.) in an oxygen containing atmosphere. Therefore, an initial electrode structure formed prior to this deposition must be stable both during and after this HDC deposition, while later electrode structures formed after this deposition only need to be stable after this latter deposition.
Further, several problems exists with materials selected for electrodes in standard thin-film applications. In the case of Pt when used as an electrode, although Pt is unreactive with the HDC material, Pt generally allows oxygen to diffuse through it from the underlying BSTO HDC material in the capacitor stack to the ambient during post deposition heat treatment and can cause severe degradation of the BSTO.
U.S. Pat. No. 5,381,302 disclose a storage node capacitor and a method for forming the same by forming a conductive plug in a thick layer of insulative material such as oxide or oxide/nitride. The conductive plug is recessed from a planarized top surface of the thick insulative layer. A low contact material is formed at the base of the recess, and the barrier layer is then formed in the recess. The process is continued with the formation of an oxidation resistant conductive layer and the patterning of the same to complete the formation of the storage node electrode. Since the barrier layer is protected during the formation of the dielectric layer by both the oxidation resistant conductive layer and the thick insulative layer, there is no oxidation of the barrier layer or the contact plug, thereby maximizing capacitance of the storage node.
A method of forming a microelectronic structure is disclosed in U.S. Pat. No. 5,665,628, and comprises an oxidizable layer, an amorophous nitride barrier layer overlying the oxidizable layer, an oxygen stable layer (platinum) overlying the amorphous nitride layer, and a high-dielectric-constant material layer (BSTO) overlying the oxygen stable layer. The amorphous nitride barrier layer substantially inhibits diffusion of oxygen to the oxidizable layer, and thereby minimizes deleterious oxidation of the oxidizable layer.
U.S. Pat. No. 5,585,300 disclose a method of making conductive amorophous-nitride barrier layers for high-dielectric constant material electrodes in which an oxygen stable platinum layer overlies an amorphous-nitride layer that is disposed over an oxidizable layer, and wherein a high-dielectric-constant material layer of BSTO overlies the oxygen stable layer.
A conductive exotic-nitride barrier layer for high-dielectric constant material electrodes is disclosed in U.S. Pat. No. 5,851,896 and comprises an oxidizable layer, a conductive exotic-nitride barrier layer overlying the oxidizable layer, an oxygen stable layer (platinum) overlying the exotic-nitride layer, and a high-dielectric constant material layer (BSTO) overlying the oxygen stable layer. The exotic-nitride barrier layer substantially inhibits diffusion of oxygen to the oxidizable layer, thereby minimizing deleterious oxidation of the oxidizable layer.
The Pt/BSTO/Pt stack is one of the most promising capacitor materials system for next generation DRAM devices; however, even though Pt is a good oxidation resistant material, oxygen can diffuse through Pt from the BSTO layer during post deposition heat treatment. Accordingly, there is a need in this microelectronic area to devise economic means by which to better prevent the out-diffusion of oxygen from BSTO to ambient.